Description

The 74LS155 is a Dual 2-to-4 Line Decoder/Demultiplexer IC in the TTL Low-Power Schottky (LS) logic family, housed in a standard 16-pin DIP through-hole package. It features two 1-of-4 decoder/demultiplexer sections with common binary-address inputs and individual strobe (enable) inputs, allowing each 4-bit section to be activated or inhibited independently.

When both sections are enabled via their strobes, the common address inputs sequentially select and route the associated input data to the appropriate output of each section. A useful design detail: data applied to input C1 is inverted at its outputs, while data applied at input C2 passes through true — the inverter on the C1 data input allows the chip to also be configured as a 3-to-8-line decoder or 1-to-8-line demultiplexer without needing external gating. Input clamping diodes are included to minimize transmission-line effects and simplify system design. The individual strobes also make it easy to cascade multiple chips together for decoding or demultiplexing larger data words.

This flexibility makes the 74LS155 a popular building block in classic digital logic design, memory address decoding, data routing, and multiplexer/demultiplexer circuits.

Key Specifications

• Function: Dual 2-to-4 line decoder / dual 1-to-4 line demultiplexer
• Logic Family: TTL, Low Power Schottky (LS)
• Package: 16-pin PDIP (through-hole)
• Supply Voltage: 4.75V–5.25V (5V nominal)
• Operating Temperature: 0°C to 70°C
• Output Current (Low): 8mA

Common Applications

• Dual 2-to-4-line decoder 
• Dual 1-to-4-line demultiplexer 
• 3-to-8-line decoder and 1-to-8-line demultiplexer (via C1 inversion, no external gating needed)
• Memory address decoding and general digital logic control
• Cascading for larger decoding/demultiplexing word widths

Package Includes

• 1 x 74LS155 IC (16-pin DIP)